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DesignWare Verification Library
The DesignWare Verification Library is a subset of the
DesignWare Library Verification IP offering and is specifically
targeted for verification farms. The DesignWare Verification
Library provides engineers an unmatched portfolio of the
industry’s most popular verification IP solutions including
PCI, PCI-X, PCI Express™, USB 2.0, Ethernet, AMBA, thousands
of memory models and more. DesignWare Verification IP is
fully functional in Vera®, Verilog, VHDL and C verification
environments and is an integral part of the Synopsys
Discovery™ Verification Platform.
The DesignWare Verification Library provides a host of
features and functionality like constrained random stimulus
generation and coverage, which reduces the burden of the
verification engineer allowing for fast and efficient creation
of sophisticated testbenches.
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